1. Field of the Invention
This invention relates to communication over a multiplex data communications network. In particular, this invention relates to the employment of a state machine to effect transfer of protocol symbols on a bus. The protocol symbols relate to establishment of communication over a data link, preferably a medium speed (Class B) system prescribed by the Society of Automotive Engineers (SAE). SAE established Recommended Practice J1850 (a set of technical requirements and parameters) which the automobile industry accepted as a standard for data communication.
2. Description of Related Art
During an initial try, using an inexpensive microcontroller (MCU), and writing software to generate pulse codes meeting J1850 requirements and then causing transmission of code from the MCU over a single-wire, communications bus (bus) to a second MCU, the transfer occurred too slowly.
To resolve the speed problem, while holding cost down, a combination of an MCU and a cooperating hardware circuit provided a combination for achieving the speed and cost sort for the task. Effort extended towards seeking such a combination resulted in the computer driven symbol-encoder/decoder (SED) described and claimed in U.S. Pa. No. 5,274,636 and assigned to the present assignee. This combination of devices employ an inexpensive MCU for performing some of the tasks necessary to generate J1850 symbols. The SED chip responds to both the MCU and an interface --driver/receiver (IDR). The IDR performs conversions of transmitted digital-pulse codes from the MCU into variable pulse width modulated (VPWM) line codings of J1850 symbols acceptable for transfer over the single-wire bus. The IDR wave shapes the VPWMcodings into the form suitable for transmission over the bus and then drives that signal over the bus where listening nodes can receive it.
The MCU, connected between the input device and the SED, does the following: 1) receives magnitudes of the measurands, 2) formats the magnitudes into address codes for selecting symbols of various pulse widths for transmission over the bus, 3) polls inputs and output ports connected to the IDR via circuits in SED in order to determine the presence of symbols appearing on the bus, 4) initiates transmissions of the symbols over the bus, 5) determines the needs for interbyte separation (IBS) during transmission, and 5) detects and resolves issues of arbitration associated with more than one node transmitting symbols on the bus.
The SED includes a plurality of symbol data in the form of digital coded words stored in a decoder ROM. These words represent the various pulse widths of the various J1850 symbols used to depict the magnitudes of the measurands. Input terminals of the SED accept address codes from the MCU and the SED uses the addresses to select the symbol data words from the decoder ROM and to place the digital-coded words for the selected symbol at the output of the decoder ROM.
The IDR accepts the digitally-coded words from the decoder ROM as serial, digital-data pulses, converts each pulse into a representative analog signal and then transmits the signal, over the single-wire bus to other listening nodes. The IDR in the transmitting node also receives a second set of the serially transmitted analog signals placed on the bus and reconverts the analog signals back to representative digital pulses. This second set of pulses route back to the MCU. The transmitting and receiving of each digital pulse by the IDR occurs in a single cycle of operation.
The SED also includes a digital filter circuit that filters the second set of digital pulses to ensure bit legitimacy and a bit decoding circuit for converting the second set of digital pulses into address codes for addressing a portion of the decoder ROM containing symbol data words representing measurand information contained in the second set of digital pulses.
Another circuit included in the SED interrupts the sequencing of a main program in the MCU upon receipt of the second set of digital pulses and then sends a received address code to the MCU to cause the translation of the second set of digital pulses into the measurand information originally placed on the bus.
The MCU includes software that reacts with byte buffers and flags associated with a random access memory (RAM), firmware that reacts with a read only memory (ROM), a foreground program serving primarily as a task dispatcher and a background program serving primarily to provide selectable task invoked by the received addresses sent from the SED.
Employing this MCU/SED/IDR combination requires 50% of the MCU processing power when transmitting symbols over the bus and 25% of the power when receiving symbols over the bus using a well-known M68HC05 microcontroller of Motorola Corp, Phoenix, Ariz. as the MCU. This arrangement requires at least 12 lines of hardware connections between the SED and MCU and a relative large number of software interfaces within the MCU to meet J1850 requirements.
Realizing the high percentage of processing power and the large number of hardware connections required to implement J1850 using this MCU or an equivalent, we searched for ways to reduce both the hardware and software interfaces while improving the processing performance. That search ended in the present invention which accomplishes reducing the hardware and software interfaces for starting the transmission of a J1850 message, and for performing the reception and arbitration of messages if more than one message appears on the bus nearly simultaneously.